Tips for EMI Reductions

1. Keep all traces that carry high frequency and fast edge rate signals in stripline in place of microstrip.
2. Make provision for spread spectrum clock in the design to reduce the peak amplitude of the radiated spectrum.
3. Keep traces that carry high frequency and fast edge rate signals well inside the edge of the board.
4. Keep the differential signals as symmetrical as possible.
5. On the clock signal place an unpopulated small capacitor close to receiver. The capacitor reduces the edge rate of the clock signal, marginally reducing the EMI. It can make marginally failing system to pass.
6. Use connectors that have inbuilt common mode chokes.
7. Keep the high speed traces away from the traces that go to the connectors. The crosstalk that enters to the signals going out of the box can radiate and become source of failure.
8. Keep the power and ground signal layers as close as possible.
9. Keep the lengths of high speed signals as small as possible. Place the ICs and component such that the lengths of high speed signal traces are minimized.
10. If there are many values of series terminating resistance that gives acceptable values, use one with slightly higher resistance value – this will reduce current and minimize EMI.
11. Use lower operating voltage for clock oscillators, if possible. Given a choice to operate a clock oscillator at 3.3V and 2.5V, use 2.5V in place of 3.3V.
12. Make provision for metallic shielding around RF circuits.
13. Keep high speed traces away from the connectors at the edge of the board.
14. Use extra power and ground layers if they are not expensive.
15. User technologies that uses lower voltage for operation.
16. Make provision for a ferrite choke at the entry path of power supply to reduce the conducted emission.



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