Signal Integrity Quiz

Signal Integrity # 2

Quiz from the book - Signal Integrity for PCB Designer..

Q1. An Oscilloscope has rated bandwidth of 10 GHz. Using this oscilloscope the 10%to 90% rise time of this signal is observed to be 60 ps. What is the approximate actual rise time of the signal.

A . 30ps
B . 48ps
C . 56ps
D. 74ps

Q2. Which of the following is best for very high frequency ( 1 GHz or more) power supply noise filtering

A . Electrolytic Capacitors
B . Ceramic Capacitors
C . Ceramic capacitors with low ESR.
D. Capacitance formed by power planes

Q3. Consider a transmission line with characteristic impedance Zo. A driver of source resistance x drives the transmission line. What should be the value of the series resistance to in the series termination scheme to minimize reflection:

A . Zo-x
B . Zo/2 x
C . (Zo-x)/2
D. Zo+x

Q4. Which of the following is not a reason for using adjacent ground and power plane scheme.

A . It provides power supply filtering at very high frequency.
B . They provide decoupling for low frequency noise.
C . Adjacent power and ground planes have high inductance between them required for high speed signals.
D. It reduces EMI.

Q5. The electric signal travels fastest in

A . Stripline
B . Microstrip with soldermask
C . Microstrip without soldermask
D. stripline having high Er material

Q6. Which of the following packages have highest pin inductance


Q7. Which of the following is NOT true about SSN ( Simultaneous Switching Noise)

A . Faster IO edge rates generate more SSN
B . Greater the number of data I/O pins, more is the SSN.
C . Smaller load capacitance increases SSN.
D. Higher package pin inductance increases SSN.

Q8. When a signal propagates down a transmission line, it is reflected by a lumped capacitor encountered in its path. Which of the following is not true

A . The magnitude of the reflected wave is higher if the rise time is shorter.
B . The reflected wave has polarity opposite to that of the incident signal
C . The magnitude of the reflected wave is smaller if the impedance of the transmission line is high.
D. The rise time of the transmitted signal slows down.

Q9. Which of the following is not the reason for speed improvement of DDR2 over DDR

A . DDR2 has on die series termination, while DDR has motherboard series termination.
B . DDR2 has differential Data Strobe Signals (DQS) while DDR has single ended Data Strobe Signals (DQS)
C . DDR2 has smaller clock latency (CL) than the DDR
D. None of the Above

Q10. It is required to achieve 50 ohm impedance on a 2 Layer board which has bottom layer as the ground layer. Which of the following will achieve this with least thickness of the top layer trace.

A . Board thickness 0.063 , Er = 4.7
B . Board thickness 0.033 , Er = 4.7
C . Board thickness 0.063 , Er = 3.8
D. Board thickness 0.033 , Er = 3.8

These quiz have been taken from the book

1.Signal Integrity for PCB Designers by Vikas Shukla.
Quiz #1

Quiz #2