Pin Constraint file for Spartixed board


This is the UCF file for the spartixed board. Use it to map the module pins to the actual pin in the board.

Please delete or comment out unused pins. The current version is v0.01. It does not include the pins on the header. 



// Spartixed  ucf file
// version v0.01
// Refer to http://referencedesigner.com for details, schematics and example programs
 
 
// Switches 
 
NET "sw2" LOC = P124;
NET "sw3" LOC = P126;
 
 
//LEDs
 
NET "led1" LOC = P127;
NET "led2" LOC = P131;
 
 
// 50 MHz Input Clock 
NET "clk" LOC = P55;
 
 
// Seven Segment Display
 
NET "sega" LOC = P5;
NET "segb" LOC = P141;
NET "segc" LOC = P16;
NET "segd" LOC = P21;
NET "sege" LOC = P22;
NET "segf" LOC = P2;
NET "segg" LOC = P15;
NET "segdot" LOC = P17;
 
 
// Select Digits for 7 Segment Display
 
NET "select_7seg1" LOC = P12; 
NET "select_7seg2" LOC = P144;
NET "select_7seg3" LOC = P142;
 
Input DIP Switches
 
NET "dip1" LOC = P33;
NET "dip2" LOC = P32;
NET "dip3" LOC = P30;
NET "dip4" LOC = P29;
NET "dip5" LOC = P27;
NET "dip6" LOC = P26;
NET "dip7" LOC = P24;
NET "dip8" LOC = P23;
 
 
 
// Serial Port
 
NET "txd" LOC = P80; // Output Pin Transmit Data
NET "rxd" LOC = P81; // Input Pin Receive Data
 
 
// I2C Bus CAT24C08YI-GT3
 
NET "i2c_scl" LOC = P78; // Output Pin Clock
NET "i2c_sda" LOC = P79; // Bidirectional Data
NET "i2c_wp" LOC = P75; // Write Protect
 
 
// A/D Converter using ADC081S021
 
NET "adc_cs" LOC = P83;  // Output Pin Chip Select
NET "adc_clk" LOC = P85; // Output Pin ADC Clock 
NET "adc_data" LOC = P84; // Input Pin ADC DATA 
 
// SPI EEPROM CAT25010YI-GT3
 
NET "spi_cs" LOC = P74;  // Output Pin Chip Select
NET "spi_clk" LOC = P67;  // SPI Chip Select
NET "spi_txd" LOC = P66;  // SPI Tx Data
NET "spi_rxd" LOC = P58;  // SPI Tx Data
NET "spi_hold" LOC = P59;  //  SPI Hold
NET "spi_wp" LOC = P57; // SPI Write Protect