Allegro PCB Design Tutorial
Length Matching
In many cases you need to match the length of the traces that are routed. For example in DDR memory routing the D0 to D7 traces should match to say within 50 mils of each other.
Allegro provides the capability to set constraints for the trace length matching. The steps involved are
1. Route the traces without the constraint and find out the length of the longest trace.
2. Set up the contraint so that the max length is the length you noticed above and min length is like 50 mils ( ( or 100 mils as the case may be) less than the max length.
This video shows the action.