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EMI with Single Ended Clock Signals over cable

October 1st, 2014

If you are carrying a clock signal ( say 50 MHz or higher ) over a Cable, that is not twisted and shielded and that ( something like a flat cable) , you are inviting EMI trouble.

The solution to this problem is to convert the Clock signal to a low voltage differential signal before it hits the cable junction.

TI's SN65LVDS9638, for example is a dual Differential driver that can take single ended input and produce a differential output. The output can then run over differential cable. Here is why the EMI is reduced when carrying the LVDS over the cable

1. The swing of voltage is low ( and we can afford to keep the voltage low because, we are only measuring the differential signal).

2. The cable can be twisted and the magnetic field from the positive signal is canceled by the magnetic field from the opposite signal.

3. Finally the cable itself can be shielded to further reduce EMI.

One the receiver side use SN65LVDS9637 ( dual drivers) to convert the differential signal back to single ended.

The problem with approach is though the skew introduced by the single ended to differential converter, the length of the cable and the differential to single ended conversion. If there are clock as well as data signals, the skew must be taken into account when designing at higher clock frequency.

If your board is failing due to the Clock signal running over a cable, try hooking up a pair of the differential drivers and the receivers at the two ends of the cable and see

1. If the scheme works. Check the clock skew and its relation to the Data signals.
2. Check if EMI reduces.


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