Home > Uncategorized > DDR3 Memory Design in i.MX6 - 1 GByte Vs 2 GByte Vs 4 G Byte

DDR3 Memory Design in i.MX6 - 1 GByte Vs 2 GByte Vs 4 G Byte

September 5th, 2015

Most of the original reference design of i.MX6 had a total of 1 Gigabyte DDR3 RAM. The implementation was using four Micron MT41K128M16 parts. Each part is a 2 Gigabit ( translates to a 256 Mega Bytes).

To extend it to 2 Gigabyte, we need to change the part number of the Micron chips to MT41K256M16 which is essentially a 4 Gigabit part.

The Data Bytes have a size of 16 for each of the for RAMs and using 4 of these chips allows us a bus width of 64 bits. It is possible, for example to design 1 GB using just two of the MT41K256M16 ( 4 Gigabit or 512 MegaByte) part, but then the throughput will be halved.

To extend the memory to 4 Gigabytes, the earlier freescal approach was to use 8 memory chips each of 512 Megabytes- for example using 8 of the Micron MT41K256M16 parts. This requires use of two chip select lines ( Pins Y16 and AD17 named DDR_CS0 and DDR_CS1 respectively). With 8 DDR chips the design becomes complicated as far as routing is concerned.

Micron offering of the 8 Gigabit ( 1 Gigabyte) Twin Die part makes it possible to extend the DDR3 RAM to 4 Gigabyte using only 4 Parts. Using the part number MT41K512M16 you can design board that uses just 4 of these parts for 4 Gigabyte memory. This newer Twin Die part defines 4 new pins that we should take consideration of.

1. ODT[1:0] - The Micron MT41K512M16 has two ODT pins ODT1 and ODT0 ( Pin numbers J1 and K1) as compared to only one ODT pin ( Pin #K1) in MT41K128M16 and MT41K256M16. The pin K1 in the DDR3 RAM is connected to Pin AC16 of the i.MX6. When using the Twin Die part we will need to connect the newer ODT1 pin (J1) to Pin # AB17 of the i.MX6.

2. Chip Select - We have two Chip selects CS1 and CS0 in the Twin Die Part. The newer Chip Select CS1 (Pin #L1) should now connect to Pin AD17 of i.MX6.

3. CKE1 - The newer CKE1 pin on Twin Die part ( Pin # J9) should now connect to Pin # AA11 of i.MX6

4. ZQ1 - The ZQ1 pin on Twin Die Part ( Pin # L9) should be pulled down to 240 Ohm resistance.

With these changes, if we attempt to load the latest uboot and the kernel and configure them for using 4 G Byte RAM, you should be able to get advantage of more memory. Combine this with i.MX6 Quad Plus processor and you should get significantly higher performance. This is before the launch of i.MX8.

Summary of Changes for 4 Gigabyte Design

1. Connect AD17 AA11 AB17 in iMX6 to L1 , J9 and J1 of MT41K512M16 (twin die DDR3L).
2. Add a 240 Ohm Pull down on pin J9 of MT41K512M16.

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