Reference Designer

Many embedded engineers have to work on Serial Ports. In fact serial port still is a dominant mode of communication between devices in embedded systems even after the advent of USB and many other media.

The purpose of this blog is to mention a very simple way to memorise the pin numbering of the Serial Port pin numbering in the DB9 Connector of the Serial Port.  I am not going to mention what all the 9 pins of the serial port connector do that. There are other places including wiki where you can get that information. I am also not goint to mention what all the serial port protocol is.

All I am going to mention is that most serial port communication consist of just three pins – A ground, a  Transmitter and a Receiver. So Pin 5 in the DB9 is the ground. And if you do not remember it you should. You will often need this pin to be able to measure and check your signal on your scope. That leaves us with two more Pins – A transmitter and a Receiver. The Transmitter is Pin 3 and Receiver is Pin 2.

In your computer the Transmitter is Pin 3. And that is all you need to remember. And here is an easy way to remember – both the words Transmitter and Three has the alphabets ‘T’ and ‘r’.  And with this fact memorised you know that the receiver is going to be Pin 2.

And of course, if you still have confusion, hook up a Oscilloscope and attach the ground of the Oscilloscope to Pin 5. Now connect the tip of the oscilloscope probe to Pin 3. If you now open a Hyperterminal and write anything in your Hyperterminal you should see some data on that Pin 3 of the DB9 Connector.

Hardware Design hardware

Google to launch 18 Android phones
May 29, 2009

At the Google I/O Developer Conference , google announced that it will ready at least 18 Android phones to ship in 2009. Google will launch part two of its Android Developer Challenge contest in early August.

Google I/O Developer conference touched upon a wide variety of development issues, such as the new “Google Web Elements” widgets that can be added to websites, and a “Google Wave” rich-media communication and collaboration technology that combines email, IM, and photo-sharing.

Android developers, received their fair share of attention at the San Francisco event, with sessions available on Android design and speed-up tips, battery life issues, real-time games, debugging, the Android Media Framework, text-to-speech and other eyes-free interaction interfaces, and “supporting multiple devices with a single binary.” According to The New York Times, Andy Rubin, Google’s senior director for mobile platforms, announced the company’s estimate that 18 to 20 Android phones would ship this year, from eight or nine different manufacturers.

Many of these phones, are minor variations on a theme, for example from Samsung and HTC this year. However, the list does not include devices that use a basic Android system. It was also learned that carriers will be slower to release phones in the U.S. than in Europe, due to the desire to make distinctive modifications in the more competitive U.S. market.

Hardware Design android, software

Tektronix TDR

Tektronix simple toolset combines the ultra fast acquisition of the Tektronix DSA8200 Sampling Oscilloscope to capture critical TDR edges with automated setup & calibration routines allowing you to efficiently perform measurements for cables, connectors, and backplanes.

A Time Domain Reflectometer (TDR) is used to measure the impedance and path loss of a lumped element or a transmission line. The TDR emits a short pulse, typically 25 ps. Let us assume that emitted pulse flows down a transmission line of infinite length or a transmission line terminated in its characteristics impedance. If there are no discontinuity along the path of the transmission line, there will be no reflection. The TDR screen will just show an incident signal. There will no signal from reflection.

Now let us assume that a finite transmission line of say 10 inches in length is left open on the far end. If a short pulse is sent out to this transmission line, it will reach to the end of the transmission line and get reflected. The polarity of this reflected signal will be same as the incident signal. The two signals will add and travel back towards the TDR. The reflected signal can be observed in on the TDR screen.

TDR has been used in telephony to find the break positions of a cable. It has been used to detect and estimate the distance where the cable has possibly broken. This is done by calculating the distance using the formula c x t, where c is speed of the wave propagation in the medium and t is the time it takes to traverse the medium. A marker is placed at the launch time and another at the time when the reflected signal comes back from broken cable. The TDR screen shows waves as it traverses the cable and come back. By dividing the time between the launched signal and the reflected signal by 2 we get the time it took for the signal to reach from launches end to the broken end. Multiplying this time by the signal propagation velocity gives the distance.

In high speed digital designs, TDR is used to measure the characteristic impedance of traces. It can also be used to measure the values of lumped circuit element, for example, load capacitance of an IC.
Let us assume that a transmission line is terminated in a lumped element of impedance Zt.. As a result there is reflection from the end of the transmission line. The magnitude of the reflection is referred to as the reflection coefficient or ρ. The reflection coefficient is calculated as follows:

ρ = (Zt-Zo)/(Zt+Zo)

Where Zo is defined as the characteristic impedance of the transmission medium and Zt is the impedance of the termination at the far end of the transmission line.
ρ can be computed by taking the ratio of the incoming reflected signal with respect to the incident signal. We can then find the value of Zt.

TDR can also be used to find the discontinuities along the transmission line as the signal propagates from one end of the transmission line to the other. At each discontinuity there will be reflection. These reflections can be observed on the TDR.

A part of this blog is taken from the book “Signal Integrity for PCB Designers”, by Vikas Shukla

Hardware Design hardware, high speed, SIgnal Intehrity, TDR

Speech and Audio are two preferred  ways of communication. By speech, we  generally mean the method of two-way sound communication used in telephony or similar situation, for example, video conferencing that includes audio communication. By audio we will generally mean higher quality sound used in broadcast, CD, DVD, music and video.

Speech or audio coding is used to digitize the analog sound and then reduce the number of bits required to represent the sound. The challenge to the coding is to use as few bits as possible to represent the sound while maintaining the decoded sound as close to the original sound as possible. In general, higher bit rate will represent a better quality and a lower bit rate will represent inferior quality. The bit rate and the quality of the decoded sound will depend upon the coding algorithm and scheme for a particular application. An understanding of the sound, environment, channel conditions and limitation is important to make a correct choice of a coding scheme.

Issues in Speech Coding

The basic requirement of a Speech coding is to produce high quality sound while taking as little bandwidth as possible. The codec should require small processing power. The delay in coding should be small. The codec should perform well under error prone network conditions. Finally, the interconnected networks, where there multiple coder and decoders are interconnected together should offer acceptable speech quality.

Quality and Bandwidth

Quality is the foremost important parameter against which all the codecs will be compared. The goal  is to satisfy generally contradictory requirements of lower data rate and higher quality. Two important parameters for comparing two codecs are the bandwidth requirement and the quality. The quality is measure in terms if MOS or Mean Opinion Score.

MOS – Mean Opinion Score is used as a way to evaluate the performance of speech coders. To find the MOS of coders, listeners are asked to classify the quality of the encoded speech in one out of five categories – excellent(5), good(4), fair(3), bad(2) or poor(1). The average of  numerical value assigned by of all the listeners are taken to produce the MOS rating. A MOS rating of 4.0 or higher indicates a good quality. It is not a mathematical way of evaluating speech codec. It is subjective to the listener and it is time consuming to perform MOS for a given codec. The results do vary from experiment to experiment. It is however, still widely used as a measure of the quality of the codec.

Signal to Noise ratio is another way to express the quality of codec.

Codec Complexity

If two codecs achieve roughly same MOS figure for a given rate, preference is made for the codec that needs lower computational complexity. The computational complexity of the codec is measured in MIPS ( Million Instructions per second). The MIPS figure generally refers to the DSP rather than the CPU. A lower MIPS figure will generally be cheaper to implement. Lower computational power requirement can lower the burden on the processor. Another figure that could be of importance is the maximum and the average amount of the memory required during the run time of a coding. It is apparent that the coding schemes should be implemented in a way that needs  as small processing power and memory as possible.

Coding Delay

Another issue in the implementation of a speech codec is the delay encountered in coding a given sample of speech. Human ear will not detect  end to end delay upto 150 ms. A delay of 400 ms or more will be definitely annoying and is supposed to hamper the ability to comprehend the speech smoothly . A delay between 150 ms to 400 ms is the grey area where delay of as much as 250 ms is found acceptable in most cases.

The delay consists of three part – coding delay, network delay and decoding delay. Speech codecs are compared for coding delays if the overall delay exceeds 150 ms.

The ITU-T G.114 standard provides an overview of the effect of the delay on the satisfaction rating users. According to it, a delay of upto about 200 ms keeps the users in very satisfied range. A coding delay of 400 ms or more makes many users dissatisfied.

Asynchronous Tandem Connection

Between end to end conversation, there may be a number of networks interconnected together. It is essential sometimes to decode the digital speech, perform the digital to analog conversion, and re-encode the analog signal. The term asynchronous tandeming refers to the interconnection of networks in which, coded speech has to be converted into analog signal and needs to be re-encoded.
Asynchronous tandem connection gives rise to two undesired issues. First it degrades the audio quality because of reconstruction and re-sampling. Secondly, it adds to the delay due to the decoding and recoding.

Error and Packet loss in Network

Unlike the normal data transfer, packet retransmission is either not an option or the scheme if implemented introduces further delay in the network. Packet loss for speech packets is a common phenomenon in an IP bases networks. The success of speech codec will depend upon how well it performs under the error prone network and under the condition where there is a possibility of packet loss.

Speech Coding

A speech waveform f(t) can be represented as a function of time t. The waveform coding method collects a defined number of samples per second. Each sample is then digitized to represent the amplitude of the waveform.

It is obvious that, higher the sample rate, more accurate the coding will be. A 2 ksps will be inferior in quality than a 8 ksps coding. The sample rate 8 ksps used in speech coding  comes from Nyquist Criteria which states the relation between the sampling rate to cover a  given bandwidth.

A pulse code modulation is the simplest form of coding. In speech domain a PCM will consist of 8 kilo samples per second with each sample coded with 8 bits giving a bit rate of 64 kpps.

Areas of Development and Refinement

There are many areas on Speech coding that needs refinement and further research. The methods used in one set of application needs to be tested and applied in other scenario and situation. For example the packet concealment developed for G.711 needs to investigated to be applied and evaluated for the other codecs as well.

Error Concealment

VoIP is gaining importance to the extent that it is about to overtake other forms of telephony and speech communication. Packet loss is a common phenomenon is cable based network and to some extent in DSL network. The research in error concealment algorithms ( G.711 concealment, Global IP Sound’s iLBL codec) has been recent developments. Redundancy algorithms can be used to overcome the poor quality of the coded resulting from packet loss. More development needs to be done. This area promises scope of improvement in the audio coding for VoIP.

Codec Performance Assessment

If a mathematical way could be found to assess the performance of codecs, it will be a great tool to replace the human oriented MOS type tool. Modelling mathematical codec assessor is a challenge. More challenging is the ability to assess codec performance under varying channel conditions, error conditions and packet loss conditions.

Network specific Speech codec design

Original codecs were designed for PSTN e.g. G.711 , G.726 and G.728. Modifications to these codecs were made to make them suitable for other networks e.g. – voice over Wi-Fi. As a result, packet loss concealment, comfort noise addition, were added to expand their capabilities.  However, designing a codec with a particular network in mind is expected to provide better quality, lower rate, low delay and robustness to error.

By Vikas Shukla
Vikas Shukla is currently working as Senior Design Engineer at BL Healthcare. He has degree in Computer Science and Engineering from IT-BHU, Varanasi, India. Mr. Shukla has over 15 years of experience in design of microprocessor-based systems. His expertise includes signal integrity, architecture and design of remote patient monitoring systems. The views expressed are his own.

Hardware Design, Programming design, hardware

Engineering Managers have to take a number of crucial decisions early in the design stages of the Medical devices. The managers must understand the general requirements pertaining to the design of general processor based electronics devices along with the requirements specific to the medical field. The more we understand the various fabrics, hardware as well as software, of the design stage, the better it helps in taking the decision.

It is utmost important to note that the decision making process must be guided by the truth searching rather than the quick assumptions. The following is a general guideline that will help managers get familiar with the fabrics of the design of a processor based medical device.

Choice of Processor

The most important parameter that will govern the choice of the processor will depend upon its ability to satisfy the needs of the application. A typical application may require 4000 MIPS processing power, 2 USB, 1 Ethernet, 3 Serial ports, support for 1 Gbyte NAND Flash, Bluetooth, 802.11b, Audio,  XVGA LCD, touchscreen. Once basic processor and peripheral requirements are satisfied, we may narrow down our choice to the pricing, speed of processor for future enhancement and previous experience with the processor line.

It will also depend upon the software support offered by the processor as also the experience of the design team members with a chosen series of the processor.

Absolute comparison of processors is a difficult task, especially in embedded arena. Unlike desktop arena, there is a lack of the benchmark data comparing processing powers of the embedded processors.

Software Support / Operating System

The choice of Operating System will be decided by the expertise of the existing team and the support for the available processor. Some of the choices that exist for the choice of the operating systems are VxWorks, Windows CE, Linux ( comes in various flavors), Embedded NT, DSP/BIOS, pSOS, eCOS, ATI Nucleius, LynxOS, ThreadX.

As soon as the choice of the Processor is about to be made, the software team should be involved. If the choice is made for example, for  Linux system, the software team should be asked to download the complete Board Support package and go through  the process of compiling the complete Linux chain including Boot Loader, Kernel and the part of the application. If the hardware design implements additional circuitry that needs driver development, the software team must analyze the additional efforts required to develop it.

It is likely that half of the time the team working on a project would like to keep the operating system same when trying to switch the processor for a different system. This makes sense in many cases, as they feel comfortable with the existing system and are confident that most of their code will work without modification in the new system. However, when there is a change in the underlying hardware, it may make more sense to switch the operating system that is better suited to the new chosen processor or the system.

Availability of Reference Design

It is always preferable to use a proven reference design to proceed. This will minimize the number of errors and design re-spins. The designer is not expected to prove the design. His focus should be to deliver the product with minimal possible additional design efforts. On hardware design perspective, this will mean availability of the schematics design files as well as layout design files. We should not rely upon the pdf files of the schematics of simply the gerber files of the layout. The design team should make it clear to the processor sales team  that they will have a better chance of adaptability only if they provide the reference design files. If the reference design uses a CPLD or a FPGA, the design team must make sure that they have the source code and they understand the tools required to build the Verilog or VHDL source code.

The lower level software also forms the part of the reference design. This must be evaluated by the firmware engineer. If a right choice is made based depending upon the availability of the reference design, it is possible to get the embedded board up and running in first power up.

Use of CPLD / FPGA

Use of CPLDs and FPGAs ( Field Programmable Gate Arrays) provide hardware design flexibility, cost reduction, space saving and many other exotic  features. However, if the designer chooses to use CPLD or FPGA in the design, he must take into account the time required to develop verify and maintain the code for the CPLD/FPGA. It will also depend upon the available manpower and expertise available.

Battery Power Requirements

A key challenge in the design of portable medical device companies is to achieve two goals which have contradictory requirements – the goal of low power consumption and that of high performance.

The medical devices usually will fall in one of the two categories. The first category is that of  small microcontroller based systems that will  be required to operate many months before requiring recharge and or battery replacement.

The second category is of the full fledged processor based system with potentially LCD displays that have battery life in hours or in days at the most.

In both cases designer will have to work with power system design engineers, software team to implement the lower possible current consumption – most importantly in idle state.

EMI/EMC Compliance, EMC 60601-1, EMC 60601-2 requirements

The Safety requirements must be understood before the system is taken to the compliance tests. This is a very broad area and the EMI test , ESD test, safety test requirements must be clearly understood right at the beginning of the design.

EMI test will require that the PCB Layout must follow the schemes that minimizes radiation from the board. This will require power plane planning, proper terminations for all high speed signals. The designer must be prepared for the case when the design may fail in EMI test even after taking care of all possible design rules. The designer should make a provision for the Spread spectrum oscillator and a faraday cage, in case, the design marginally fails in EMI test. This will avoid costly re-spin.

Medical standard require that the fire enclosure for any unit with power rating 15W or greater should be 94V0 or better. The mechanical designer must work with the electrical engineers to find if the power consumption of the board is expected to stay within 15 Watts.

Electrostatic Discharge (ESD) is the abrupt release of charge from one object) to another. Such a discharge can permanently damage or otherwise upset the function of sensitive electronic circuits. ESD requirement can usually be fulfilled if we make provisions for the ESD diodes at all connector pins. ESD tests can be destructive if provisions for ESD safety are not provided with the board.

If power supply modules are used, we must ensure that they have follow required safety standards. All power system should be designed such that the short and open circuit conditions do not create hazard. The power supply regulators should have current limiting features. Reverse battery protection must be provided.

FDA Approval

Once we determines that the device falls into the category of the Medical Device, we will  have to get FDA approval to be able to sell the device in US market.

FDA classifies the Medical devices in three categories Classification identifies the level of regulatory control that is necessary to assure the safety and effectiveness of a medical device. We must understand the processes involved in getting the FDA approval. Different categories of the devices have different requirements. When taking the product requirement we must know the quality norms and requirements that must be adhered to. FDA recommends you validate your device under actual or simulated use conditions to ensure the device conforms to defined user needs and intended uses. As  part of the verification test, the devices verification test must be performed and recorded.

A detailed discussion about the approval process is beyond the scope of this paper. FDA approval process in neither difficult nor technically intensive as far as it does not involve drug and invasion to body parts. However, a prior experience to the FDA approval process greatly helps.

Signal Integrity Requirements

Signal integrity  is a measure of the quality of a electrical signal ( usually high speed). A degradation is the quality of the high speed signals can lead to system failures, data loss.

Most embedded processor based systems now a days have high speed data bus including DDR, PCI-X, USB 2.0, SATA and others. Any failure not to observe signal integrity requirement will lead to unstable system performance and will be catastrophic for the Medical data logging based system. All systems must be analyzed by an expert in the Signal Integrity. Besides that the system must be tested for frequency margin  and voltage margin to see if it fails due to any signal integrity issue.

The signal integrity engineer must be involved at the very beginning of the design cycle, when the team is making critical architectural decisions and selecting component technology. Signal integrity engineer should be able to tell the amount of the efforts that will be required to simulate, if any, the high speed signals and the amount of the time and effort it may take. The Signal integrity and the testing team must develop a comprehensive simulation and measurement strategy that applies the appropriate level of analysis to each bus in the system.

Continued availability of components

As soon as the design starts all the components must be procured, at least in smaller quantity. This exercise will make any long lead component known ahead of time. The PCB designer must get samples of unverified components and ensure that the Library is correct not only by checking the design, but, also by physically inspecting the component.

Medical devices usually have much longer life than the consumer goods. This demands that  the component selection requires additional thought for assurance of continued availability.

The designer should make a checklist of the components that may go out of life in a specified amount of time. A possible alternate source must be listed. If the component does not have any alternate source it must be pointed out if in the check list. All such components should be grouped together and, if possible the electrical nets should go to an add on card connector for a possibly different source alternative.

Analyze the Potential Risk Areas

No matter how good the design is, there are always some risk areas which can derail the deadline. All possible risk areas must be analyzed and documented. This will make everyone aware of the potential pitfalls. Attention must be paid to the high risk areas. It often happens the most of the meeting times are devoted to discuss petty things, like GUI interface and look and feel while more important discussion regarding core system design and the driver software development, potential hardware/ software integration issues get un discussed as these are difficult to follow.

The Engineering Manager’s only way to be able to analyze the risk will depend upon his past experience and his ability to keep himself updated of the technologies followed behind the design. This will be in addition to the feedback and analysis of his team members.

Mechanical Enclosure design

Medical devices have been historically designed with best exotic appearance. The design team must have a team member who not only can apply design techniques, but can also be creative in design. The creativity aspects can only be known from his demonstrated past experience. The team members should ensure the requirements are delivered and rest should be left to the imagination of the enclosure designer.

Vikas Shukla is currently working as Senior Design Engineer at BL Healthcare. He has degree in Computer Science and Engineering from IT-BHU, Varanasi, India. Mr. Shukla has over 15 years of experience in design of microprocessor-based systems. His expertise includes signal integrity, architecture and design of remote patient monitoring systems. The views expressed are his own.

Hardware Design medical design, telemedicine

ESD or Electrostatic Discharge is the transfer of an electrostatic charge between two objects. When two objects of different electric potential come into contact there is a surge of electric current.

An object may become negatively charged by gaining electrons on its surface from another object. The object that transfer electrons become positively charged. In practical medical application a charged human body or object can come in contact with the medical appliance. The extra charge will discharge in the appliance and may or may not cause failure. The designer must ensure that the medical appliance is able to withstand static electricity.

Failures caused by Electrostatic Discharge can happen in a number of different ways. The electrostatic discharge can propagate to the ICs fusing together a junction. It may permanently damage the medical device. In medical applications it can cause the device to malfunction in the middle of the process of data acquisition or transmission causing potentially serious medical hazard condition. The handheld medical devices are more susceptible to human induced ESDs. While permanent failure of the ICs are less likely, though not impossible, the button malfunctioning can induce functional errors. Designers must resolve and test these issues.

Methods of Preventing ESD and ESD induced errors

A number of different strategies exist to prevent and ESD induced error. The designer should implement these to comply with the ESD safety standards as well as to avoid any failure and malfunction.

Shunting ESD Energy

Zener Diodes, Metal Oxide Varistors, transient voltage suppression (TVS) diodes, and regular  (CMOS) or bipolar clamp diode can be used to shunt the ESD energy thereby providing protection to the ICs. These are designed to absorb electrostatic discharge (ESD) energy that is introduced from I/O ports and travels through the connector onto the system board. ESD-protection diodes thus provide  protection against ESD-induced system malfunction and/or damage to ICs. The designer may add an ESD diode at all the connectors pins to prevent any ESD from entering into the ICs.

These devices work very well for smaller data rates, for example RS232, power supplies, low data rate IOs, buttons and switches.

For signals at  higher data rates ( for example USB 2.0, IEEE 1394, DVI, PCI Express), the parasitic impedance of these protection devices can create signal integrity issues.

Figure 1 : Shunting ESD Energy using protection diodes.

PCB Layout for  ESD

PCB spark gaps can supplement the Electrostatic Discharge protection.  The Spark gap is created between the Signal Pins and the connector etch pad. The etch structure provides a small gap between points. This encourages a breakdown from  high voltage across the clearance. The clearance area must be free from solder mask because the solder mask has the tendency to increase the voltage breakdown of the gap. The breakdown voltage of a small spark gap is given by V = (3000pd+1350) where p is the pressure in atmospheres(1) and d is the distance in mm. A 20 mil (0.508 mm) gap will provide a voltage breakdown of 2850V. This will help designs pass the required ESD levels.

Software Key Debouncing

In handheld medical devices using membrane buttons,  ESD can momentarily induce pulses that can induce a false button press signal.  In certain conditions it is equivalent to creating hazard condition. For example, assume a medical appliance in which patient has to answer questionnaire about if he had taken a medicine. A false button press due to ESD may generate erroneous alarm and incorrect conclusions.

The designer may implement a software debounce technique in addition to the ESD diode protection to overcome this type of failure. The ESD is a very short duration phenomenon ( usually in nano seconds) and therefore a software debounce technique where the it checks for key press after an interval of 20 to 100 milliseconds provides sufficient safegaurd against the ESD induced malfunctions.

Vikas Shukla

Vikas Shukla is currently working as Senior Design Engineer at BL Healthcare. He has degree in Computer Science and Engineering from IT-BHU, Varanasi, India. Mr. Shukla has over 15 years of experience in design of microprocessor-based systems. His expertise includes signal integrity, architecture and design of remote patient monitoring systems. The views expressed are his own.

Hardware Design medical design, telemedicine